MOS 6510/8502 Microprocessor
Programmed Logic Array
Video Interface Chip (VIC-II)
Sound Interface Device (SID)
Complex Interface Adapters (CIA #1&2)
PAL/NTSC Differences
The basic C64 system (or C64 mode on the C128), is represented by a system architecture having a 6510 microprocessor, 64KB RAM (38 KB available for BASIC), 16 KB ROM (8Kb BASIC ROM and 8Kb Kernal ROM, and yes - Kernal with an "A"), 4KB char ROM, Video- and Sound interface chips, several I/O interfaces to diskdrives, tape decks, modems, printers, cartridges etc. The C64 is based on TTL voltage levels, and thus it is rather easy to alter or expand the system.
The MPU is based on Rockwell´s 6502 microprocessor architecture, with some extra features added to the digital logic. Two different versions is used, one version in the C64 (6510) and the other in the C128 (8502), furthermore there can be revisions of these (which can be of influence when using illegal opcodes).
The microprocessor has 8 bit data bus, 16 bit address bus, a typical 6502 instruction set (plus some opcodes which, -depending on the specific version of the chip- for some reason sometimes works anyway , those instructions are referred to as illegal upcodes, and some of them can do rather complex things). The 6510 MPU is running (typically) at about 1MHz (* see Note 1), the 8502 used in the C128 can be forced, via software, to run at about 2MHz (Not always without problems when interacting with the rest of the system, but clock-stretching is used to overcome some of these problems). The MOS 6510 used in the C64, can technically also run at 2 MHz, but that is not supported in the system.
The 6510 is similar to a 6502, but it has some additional I/O ports, on this system they are used for configuring memory and cassette (datasette) control. The 6502 has also a AEC control pin, which can tri-state the MPU while, for example VIC-II, or some external DMA device take over the bus. The integrated ports is controlled via address 0 (Port direction register) and 1 (Port data register).
Pin layout of the 6510 microprocessor
Clk0 1 40 !Rst RDY 2 MOS
651039 Clk2 !IRQ 3 38 R/!W !NMI 4 37 D0 AEC 5 36 D1 VCC 6 35 D2 A0 7 34 D3 A1 8 33 D4 A2 9 32 D5 A3 10 31 D6 A4 11 30 D7 A5 12 29 P0 A6 13 28 P1 A7 14 27 P2 A8 15 26 P3 A9 16 25 P4 A10 17 24 P5 A11 18 23 A15 A12 19 22 A14 A13 20 21 Vss
Note 1: The exact microprocessor frequency is depending on the VIC-II generated clock, the VIC-II is feeded with a clock which is then devided by 8 using an internal counter in the VIC-II.
The VIC-II video chip is the successor to the VIC chip used in the for example the VIC-20 microcomputer. It has different jobs to do in the machines. Besides video generation, it acts as a clock divider (the actual oscillator in the C64, is 8 times faster than the clock the 6510 is feeded with... 8 pixels - Hires - on the screen, takes the same raster-time as one CPU clock), furthermore D-RAM refresh is also a task performed by the VIC-II.
The overall architecture of the C64 makes the VIC-II use the Address/Data bus when the processor is not using it (in general). This way, better performance is achieved.. Fetch of video data (on each "badline") is a little different from this, the VIC-II then takes bus time from the processor.
The VIC-II exist in different forms, used in different models of the C64/128.
Different models of the VIC-II (Preliminary) PAL NTSC C64 (Old model) MOS-6569 MOS-6567 C128 / C64C (Newer model) MOS-8565 MOS-8562 C128 MOS-8566 MOS-8564
>> Under construction <<
The 28-pin 82S100 Programmable Logic Array (PLA) is an important component when it comes to the architecture of the C64 and takes care of operations in connection to RAM/ROM management. The C128 has a similar 48-pin PLA called 8710.
To many people, the C64 was so special due to it´s distinctive sound. Many tunes and sounds has been made during the years. The sound and music used in demos and games was, is, and will be cult. Yes, I must admit, I too have an sid-file player installed on my PC (which emulates the processor and SID so it can use the original play routines), in fact while typing this it is playing "October Thorns" by Flotsam (Riku Kangas), a musician from Finland.
The SID is a chip like many other things in the C64, and it takes some programming in order to make it sound the way one wants it to.. Most musician (not to say all) takes the advantage of using a special piece of composer software... Today, people on the PC and Amiga etc. is calling similar composers; Trackers (Like FastTracker etc.)... The First I noticed on my C64, was a tool called "Future Composer". But I´m sure there was many others before the time of Future Composer, surely there was a lot after that (e.g. AudioMaster and such). The most successful of these, was programmed by sceners..
For programming the SID chip (maybe for making your own tracker software, or whatever), you will need to know something about the chip, it´s memory layout and things like that. And beware, when making sound and music, that there are some differences in the way different types of the SID chip sound. The best way is to test a sound on all types in order to be sure it sounds right.
Timing in a player is mostly done by using the raster (accessible via the VIC-II), calling a play routine each time the raster reached a special rasterline, there can be differences here as the NTSC systems is based on 60Hz, and PAL on 50Hz video, see the VIC-II area for more information about video generation using VIC-II. And the "PAL/NTSC differences" in this section..
As mentioned, several versions of the SID exist, they have the same memory layout however. Most people I have talk to, prefers the good old 6581. The MOS 8580 SID was used on C64C and later C128D models.
Features of the 6581/8580 Sound Interface Device
3 Tone Oscillators, Range 0-4kHz Range 0-4kHz 4 waveforms per oscillator Triangle, Sawtooth, Variable Pulse, Noise 3 Amplitude Modulators Range 48 dB 3 Envelope Generators Exponential response Random Number/Modulation generator Attack Rate: 2 ms - 8 s Oscillator Synchronization Decay Rate: 6 ms - 24 s Ring Modulation Sustain Level: 0 - peak volume External Audio Input Release Rate: 6 ms - 24 s Programmable Filter Cutoff Range: 30Hz-12kHz Master Volume Control 12 dB/octave Rolloff 2 A/D POT Interfaces Low pass, Band pass, High pass, Notch outputs Variable Resonance
MOS 6581/8580
Sound Interface Device (SID) memory layoutAddress
$D400 is base, the rest is register offset
Hex
Dec
Bitt
Voice 1
D400
54272
Frequency Control - Low-Byte
D401
54273
Frequency Control - High-Byte
D402
54274
Pulse Waveform Width - Low-Byte
D403
54275
7-4
3-0Unused
Pulse Waveform Width - High-NybbleD404
54276
7
6
5
4
3
2
1
0Control Register
Select Random Noise Waveform, 1 = On
Select Pulse Waveform, 1 = On
Select Sawtooth Waveform, 1 = On
Select Triangle Waveform, 1 = On
Test Bit: 1 = Disable Oscillator 1
Ring Modulate Osc. 1 with Osc. 3 Output, 1 = On
Synchronize Osc. 1 with Osc. 3 Frequency, 1 = On
Gate Bit: 1 = Start Att/Dec/Sus, 0 = Start ReleaseD405
54277
7-4
3-0Envelope Generator 1: Attack / Decay Cycle Control
Select Attack Cycle Duration: O-15
Select Decay Cycle Duration: 0-15D406
54278
7-4
3-0Envelope Generator 1: Sustain / Release Cycle Control
Select Sustain Cycle Duration: O-15
Select Release Cycle Duration: O-15
Voice 2
D407
54279
Frequency Control - Low-Byte
D408
54280
Frequency Control - High-Byte
D409
54281
Pulse Waveform Width - Low-Byte
D40A
54282
7-4
3-0Unused
Pulse Waveform Width - High-NybbleD40B
54283
7
6
5
4
3
2
1
0Control Register
Select Random Noise Waveform, 1 = On
Select Pulse Waveform, 1 = On
Select Sawtooth Waveform, 1 = On
Select Triangle Waveform, 1 = On
Test Bit: 1 = Disable Oscillator 1
Ring Modulate Osc. 2 with Osc. 1 Output, 1 = On
Synchronize Osc. 2 with Osc. 1 Frequency, 1 = On
Gate Bit: 1 = Start Att/Dec/Sus, 0 = Start ReleaseD40C
54284
7-4
3-0Envelope Generator 2: Attack / Decay Cycle Control
Select Attack Cycle Duration: O-15
Select Decay Cycle Duration: 0-15D40D
54285
7-4
3-0Envelope Generator 2: Sustain / Release Cycle Control
Select Sustain Cycle Duration: O-15
Select Release Cycle Duration: O-15
Voice 3
D40E
54286
Frequency Control - Low-Byte
D40F
54287
Frequency Control - High-Byte
D410
54288
Pulse Waveform Width - Low-Byte
D411
54289
7-4
3-0Unused
Pulse Waveform Width - High-NybbleD412
54290
7
6
5
4
3
2
1
0Control Register
Select Random Noise Waveform, 1 = On
Select Pulse Waveform, 1 = On
Select Sawtooth Waveform, 1 = On
Select Triangle Waveform, 1 = On
Test Bit: 1 = Disable Oscillator 1
Ring Modulate Osc. 3 with Osc. 2 Output, 1 = On
Synchronize Osc. 3 with Osc. 2 Frequency, 1 = On
Gate Bit: 1 = Start Att/Dec/Sus, 0 = Start ReleaseD413
54291
7-4
3-0Envelope Generator 3: Attack / Decay Cycle Control
Select Attack Cycle Duration: O-15
Select Decay Cycle Duration: 0-15D414
54292
7-4
3-0Envelope Generator 3: Sustain / Release Cycle Control
Select Sustain Cycle Duration: O-15
Select Release Cycle Duration: O-15
General SID control
D415
54293
Filter Cutoff Frequency: Low-Nybble (Bits 2-O)
D416
54294
Filter Cutoff Frequency: High-Byte
D417
54295
7-4
3
2
1
0Filter Resonance Control / Voice Input Control
Select Filter Resonance: 0-15
Filter External Input: 1 = Yes, 0 = No
Filter Voice 3 Output: 1 = Yes, 0 = No
Filter Voice 2 Output: 1 = Yes, 0 = No
Filter Voice 1 Output: 1 = Yes, 0 = NoD418
54296
7
6
5
4
3-0Select Filter Mode and Volume
Cut-Off Voice 3 Output: 1 = Off, O = On
Select Filter High-Pass Mode: 1 = On
Select Filter Band-Pass Mode: 1 = On
Select Filter Low-Pass Mode: 1 = On
Select Output Volume: 0-15D419
54297
Analog/Digital Converter: Game Paddle 1 (O-255)
D41A
54298
Analog/Digital Converter Game Paddle 2 (O-255)
D41B
54299
Oscillator 3 Random Number Generator
D41C
54300
Envelope Generator 3 Output
Pin layout of the MOS 6581 SID chip (28 Pin DIP package)
CAP1A 1 28 Vdd CAP1B 2 SID
658127 Audio out CAP2A 3 26 Ext in CAP2B 4 25 Vcc /RES 5 24 POT X 02 6 23 POY Y R/W 7 22 D7 /CS 8 21 D6 A0 9 20 D5 A1 10 19 D4 A2 11 18 D3 A3 12 17 D2 A4 13 16 D1 GND 14 15 D0
Other equipment using the Sound Interface Device - SID
SIDSTATION - Elektron ESI SidStation - Studio/MIDI synthesizer.
MIDIbox -
Free MIDI DIY Projects by Thorsten Klose
The 6526 Complex Interface Adapter (CIA) is a 65XX bus compatible peripheral interface device with extremely flexible timing and I/O capabilities. In the C64 CIA #1 and 2 is used for I/O communications, Keyboard, Joysticks, user port, and to some extend Paddles (Which are also using the A/D converters in the SID).
Features of a MOS 6526
16 individually programmable I/O lines
8 or 16-Bit handshaking on read or write
2 independent, linkable 16-Bit interval timers
24-hour time of day clock with programmable alarm
8-Bit shift register for serial I/O
2 TTL load capability
CMOS compatible I/O lines
1 or 2 MHz operation available
MOS 6526
Complex Interface Adapter - CIA#1&2 memory LayoutAddress
$D[C/D]X0 is base, the rest is register offset
Hex
Dec
Bit
CIA #1
DC00
56320
7-0
7-6
4
3-2
3-0Data Port A (Keyboard, Joystick, Paddles, Light-Pen)
Write Keyboard Column Values for Keyboard Scan
Read Paddles on Port A / B (01 = Port A, 10 = Port B)
Joystick 0 Fire Button: 1 = Fire
Paddle Fire Buttons
Joystick A Direction (0-15)DC01
56321
7-0
7
6
4
3-2
3-0Data Port B (Keyboard, Joystick, Paddles): Game Port 1
Read Keyboard Row Values for Keyboard Scan
Timer B Toggle/Pulse Output
Timer A: Toggle/Pulse Output
Joystick 1 Fire Button: 1 = Fire
Paddle Fire Buttons
Joystick 1 DirectionDC02
56322
7-0
Data Direction Register - Port A ($DC01). Input = 0
DC03
56323
7-0
Data Direction Register - Port B ($DC01). Input = 0
DC04
56324
7-0
Timer A: Low-Byte
DC05
56325
7-0
Timer A: High-Byte
DC06
56326
7-0
Timer B: Low-Byte
DC07
56327
7-0
Timer B: High-Byte
DC08
56328
7-0
Time-of-Day Clock: 1/10 Seconds
DC09
56329
7-0
Time-of-Day Clock: Seconds
DC0A
56330
7-0
Time-of-Day Clock: Minutes
DC0B
56331
7-0
Time-of-Day Clock: Hours + AM/PM Flag (Bit 7)
DC0C
56332
7-0
Synchronous Serial I/O Data Buffer
DC0D
56333
7
4
3
2
1
0CIA Interrupt Control Register (Read IRQs/Write Mask)
IRQ Flag (1 = IRQ Occurred) / Set-Clear Flag
FLAG1 IRQ (Cassette Read / Serial Bus SRQ Input)
Serial Port Interrupt
Time-of-Day Clock Alarm Interrupt
Timer B Interrupt
Timer A InterruptDC0E
56334
7
6
5
4
3
2
1
0CIA Control Register A
Time-of-Day Clock Frequency: 1 = 50 Hz, 0 = 60 Hz
Serial Port I/O Mode Output, 0 = Input
Timer A Counts: 1 = CNT Signals, 0 = System 02 Clock
Force Load Timer A: 1 = Yes
Timer A Run Mode: 1 = One-Shot, 0 = Continuous
Timer A Output Mode to PB6: 1 = Toggle, 0 = Pulse
Timer A Output on PB6: 1 = Yes, 0 = No
Start/Stop Timer A: 1 = Start, 0 = StopDC0F
56335
7
6-5
4-0CIA Control Register B
Set Alarm/TOD-Clock: 1 = Alarm, 0 = Clock
Timer B Mode Select:
00 = Count System 02 Clock Pulses
01 = Count Positive CNT Transitions
10 = Count Timer A Underflow Pulses
11 = Count Timer A Underflows While CNT Positive
Same as CIA Control Reg. A - for Timer B
CIA #2
DD00
56576
7
6
5
4
3
2
1-0Data Port A (Serial Bus, RS-232, VIC Memory Control)
Serial Bus Data Input
Serial Bus Clock Pulse Input
Serial Bus Data Output
Serial Bus Clock Pulse Output
Serial Bus ATN Signal Output
RS-232 Data Output (User Port)
VIC Chip System Memory Bank Select (Default = 11)DD01
56577
7
6
5
4
3
2
1
0Data Port B (User Port, RS-232)
User / RS-232 Data Set Ready
User / RS-232 Clear to Send
User
User / RS-232 Carrier Detect
User / RS-232 Ring Indicator
User / RS-232 Data Terminal Ready
User / RS-232 Request to Send
User / RS-232 Received DataDD02
56578
7-0
Data Direction Register - Port A. Input = 0
DD03
56579
7-0
Data Direction Register - Port B. Input = 0
DD04
56580
7-0
Timer A: Low-Byte
DD05
56581
7-0
Timer A: High-Byte
DD06
56582
7-0
Timer B: Low-Byte
DD07
56583
7-0
Timer B: High-Byte
DD08
56584
7-0
Time-of-Day Clock: 1/10 Seconds
DD09
56585
7-0
Time-of-Day Clock: Seconds
DD0A
56586
7-0
Time-of-Day Clock: Minutes
DD0B
56587
7-0
Time-of-Day Clock: Hours + AM/PM Flag (Bit 7)
DD0C
56588
7-0
Synchronous Serial I/O Data Buffer
DD0D
56589
7
4
3
1
0CIA Interrupt Control Register (Read NMls/Write Mask)
NMI Flag (1 = NMI Occurred) / Set-Clear Flag
FLAG1 NMI (User/RS-232 Received Data Input)
Serial Port Interrupt
Timer B Interrupt
Timer A InterruptDD0E
56590
7
6
5
4
3
2
1
0CIA Control Register A
Time-of-Day Clock Frequency: 1 = 50 Hz, 0 = 60 Hz
Serial Port I/O Mode Output, 0 = Input
Timer A Counts: 1 = CNT Signals, 0 = System 02 Clock
Force Load Timer A: 1 = Yes
Timer A Run Mode: 1 = One-Shot, 0 = Continuous
Timer A Output Mode to PB6: 1 = Toggle, 0 = Pulse
Timer A Output on PB6: 1 = Yes, 0 = No
Start/Stop Timer A: 1 = Start, 0 = StopDD0F
56591
7
6-5
4-0CIA Control Register B
Set Alarm/TOD-Clock: 1 = Alarm, 0 = Clock
Timer B Mode Select:
00 = Count System 02 Clock Pulses
01 = Count Positive CNT Transitions
10 = Count Timer A Underflow Pulses
11 = Count Timer A Underflows While CNT Positive
Same as CIA Control Reg. A - for Timer B
Pin layout of the MOS 6526 Complex Interface Adapter (CIA)
VSS 1 40 CNT PA0 2 MOS
652639 SP PA1 3 38 RS0 PA2 4 37 RS1 PA3 5 36 RS2 PA4 6 35 RS3 PA5 7 34 !RES PA6 8 33 DB0 PA7 9 32 DB1 PB0 10 31 DB2 PB1 11 30 DB3 PB2 12 29 DB4 PB3 13 28 DB5 PB4 14 27 DB6 PB5 15 26 DB7 PB6 16 25 Ø2 PB7 17 24 !FLAG !PC 18 23 !CS TOD 19 22< R/!W Vcc 20 21 !IRQ
Making C64 demos/games or other software? Or maybe NTSC/PAL fixing? Take a look at this general list?
Commodore 64 differences PAL/NTSC PAL systems NTSC systems Screen refresh rate 50 t/sec * 60 t/sec * Total Raster lines (incl. borders) 312 263 Clock-cycles per rasterline 63 cycles 65 cycles Max Sprite X pos. to the right 404 412 * A video picture is generated in two stages, which, in turn, is updating every 2. line. Beware of this when making timers etc. using the raster.
As you might guess.. Your PAL timed rasterbars looks ugly on NTSC, your PAL FLI routine can push the screen instead. And all the stuff you thought you did outside the normal visual display (the 200 rasterlines) like updating the graphics... Maybe not very nice on NTSC.... And the rasterinterrupts - still waiting? The music might sound a little different too, since the play routine is called once on each frame... Maybe you could use two different routines or time the one you are using depending on which systems it runs on?